AMD opens up crown jewels with Torrenza Initiative

At the AMD Global Vision Conference today, Marty Seyer, senior vice president of the commercial business unit, touted the Torrenza Initiative, which he said would enable the development and deployment of application-specific co-processors and other chips that work alongside AMD64 processors in multi-socket systems. First revealed in June, Torrenza basically opens up AMD's crown jewels--Direct Connect Architecture and HyperTransport technology--to OEMs, providing a standard socket that can be applied to many kinds of tasks.

Seyer was joined on stage by representatives from Fujitsu Siemens, Cray, IBM and Sun, who provided endorsements for Torrenza as an open initiative that will spur innovation.
"It's not something we thought of when we created the technology," AMD CEO Hector Ruiz told me. "It will be viral, and it's the most significant technology we have ever made. I can see the person in a garage benefiting and exploiting our billion dollar investment. There are literally hundreds of thousand of things to do [with the technology]."

AMD hopes to foster a vibrant ecosystem of custom silicon around its platform via Torrenza, extending the life of servers and allowing OEMs to differentiate their products via the common socket, as well as saving R&D costs.
 
Joseph Reger, CTO of Fujitsu Siemens said his company is already using the Torrenza socket to connect two 2-socket servers, turning them into a 4-way, or 8-core SMP. "I am a fan of the x86,  but is most important architectures stifle innovation to some extent. If you open it up sufficiently, you can put significant innovation in there," Reger said. 
  
Jan Silverman, senior vice president of corporate strategy and business development at Cray, plans to use the Torrenza socket to build a petaflop supercomputer with 24,000 Opteron sockets that will take a custom multithreaded processor, dropping the price per socket from about $127,000 to $10,000 per socket.
IBM is designing a supercomputer, code named Roadrunner, for the U.S. Department of Energy's National Nuclear Security Administration (NNSA) that uses Cell processors as an accelerator to the Opteron, said Dave Turek, vice president of Deep Computing.  Here is IBM's description of Roadrunner:

Designed specifically to handle a broad spectrum of scientific and commercial applications, the supercomputer design will include new, highly sophisticated software to orchestrate over 16,000 AMD Opteron processor cores and over 16,000 Cell B.E. processors in tackling some of the most challenging problems in computing today. The revolutionary supercomputer will be capable of a peak performance of over 1.6 petaflops (or 1.6 thousand trillion calculations per second).
The machine is to be built entirely from commercially available hardware and based on the Linux operating system. IBM System x 3755 servers based on AMD Opteron technology will be deployed in conjunction with IBM BladeCenter H systems with Cell B.E. technology. Each system used is designed specifically for high performance implementations.
Designed also with space and power consumption issues in mind, the system will employ advanced cooling and power management technologies and will occupy only 12,000 square feet of floor space, or approximately the size of three basketball courts.

"The architecture allows us to bring together a consortium of players to develop software for accelerators," Turek said. "Frankly, I don’t know what I would have done with the Cell processor if this didn’t come along."

It remains to be seen if Torrenza becomes a Trojan Horse that brings the AMD and the Opteron deeper into enterprises, at the expense of rival Intel. AMD and its partners will learn as they go, and will likely be surprised by what developers bring to market for the Torrenza socket. On the software side, some work will need to be done to offload workloads to the appropriate processors in a straightforward and consistent way.