ARM's new chip design targets high-performance computing
ARM on Monday announced a new chip design targeting high-performance computing -- an update to its ARMv8-A architecture, known as the Scalable Vector Extension (SVE).
The new design significantly extends the vector processing capabilities associated with AArch64 (64-bit) execution, allowing CPU designers to choose the most appropriate vector length for their application and market, from 128 to 2048 bits. SVE will also allow advanced vectorizing compilers to extract more fine-grain parallelism from existing code.
"Immense amounts of data are being collected today in areas such as meteorology, geology, astronomy, quantum physics, fluid dynamics, and pharmaceutical research," wrote ARM fellow Nigel Stephens. HPC systems over the next five to 10 years will shoot for exascale computing, he continued. "In addition, advances in data analytics and areas such as computer vision and machine learning are already increasing the demands for increased parallelization of program execution today and into the future."
The development shows that ARM doesn't want to be left behind in the race toward exascale computing, which would theoretically be a thousand times more powerful than a petabyte scale computer and capable of performing one exaflop of calculations per second. AMD, IBM, and Intel are all striving for it, while governments also jostle for dominance in high-performance computing.
Fujitsu will be the first to install the new chip design, PC World reported, in its Post-K supercomputer.
The announcement comes just about a month after Japan-based SoftBank announced it would purchase ARM for a whopping $31.4 billion, making a long-term bet on the Internet of Things market.