As silicon chips approach physical limits, it is becoming harder and more costly to deliver each new generation of technology. Yet the foundries that fabricate most of the world's chips seem to be announcing new nodes at a faster pace as they compete to make the chips that power the latest and greatest gadgets. This week, at an industry conference known as IEDM, the foundries announced details of the first 7nm process technology.
TSMC (Taiwan Semiconductor Manufacturing Company), the world's largest contract chipmaker, announced a 7nm process with the latest version of its 3D FinFET transistors for making future processors for smartphones and other mobile devices. To demonstrate the technology, TSMC produced a fully-function 256Mb SRAM test chip with the smallest reported memory-cell size (0.027 square microns).
TSMC said the 7nm process will deliver either a 40 percent boost in performance or a 65 percent reduction in power at the transistor level compared to the current 16nm FinFET process. It is also less than half the size at 0.43x transistor density.
That all sounds impressive, but it's worth pointing out that TSMC is not comparing it to 10nm--which is widely expected to be a short-lived node--so the gains here are for two process nodes (or perhaps three if rumors of an interim "12nm process" are accurate). Nevertheless, the fabrication of a fully-functional chip with good performance and reliability at "high yield" (around 50 percent for the SRAM but much lower for logic) is a notable achievement, and TSMC emphasized that it is focused on helping customers get their 7nm chips to market as quickly as possible.
The competing R&D alliance of GlobalFoundries, Samsung Electronics and IBM also announced a 7nm process technology, but it is taking a different approach. TSMC is using the current 193nm immersion lithography tools while the alliance's process relies on a new form of lithography, known as EUV or extreme ultra-violet, to pattern some critical layers. Since EUV won't be ready for volume production until 2018-2019, this process may take longer to get to market, but it could deliver better scaling and lower cost.
Indeed, the group said that its 7nm process delivered the tightest pitches ever reported for FinFET transistors. The key dimensions for the 7nm process all show true scaling over those of the 10nm process the alliance announced at VLSI Symposium in 2014. The dimensions are so small, it said, that without EUV some layers could easily require four masks, a process that not only significantly increases the cost but also results in more defects.
The alliance also used high-mobility materials and novel strain techniques to improve the performance of the transistors, which it said will deliver 35 percent to 40 percent better performance.
TSMC plans to start 10nm volume production this quarter with 7nm slated for the end of 2017. Samsung has already started mass production at 10nm and the first mobile processors are likely to be announced early next year.
GlobalFoundries is planning to skip 10nm altogether and go directly to 7nm. It will start "risk production" in early 2018, which means 7nm will be in volume production around one year later.
The rapid pace implies that the foundries have taken the lead in semiconductor process technology. Intel has delayed 10nm production and won't release the first processors, Cannonlake desktop chips, until late 2017. As a stopgap, Intel released a third family of 14nm processors known as Kaby Lake.
But node names are misleading since they no longer bear any relation to actual chip dimensions. It is taking longer for Intel to get to each node, but it continues to deliver true Moore's Law scaling while, in some cases, the foundries have rolled out nodes that deliver little to no physical shrink. The key dimensions for Intel's 14nm node (the distances between the fins, gates and smallest metal lines) are similar to those of the foundries' 10nm processes, and it is reasonable to assume that Intel's 10nm process will be comparable to competitors' 7nm technology.