New microchip uses 30 times less power

Summary:Scientists at Rice University have created a microchip that uses 30 times less electricity while running seven times faster than today's best technology.The U.

Scientists at Rice University have created a microchip that uses 30 times less electricity while running seven times faster than today's best technology.

The U.S.-Singapore team developing the technology, named PCMOS, revealed results at the International Solid-State Circuits Conference (ISSCC), the world's premier forum for engineers working at the cutting edge of integrated-circuit design.

Conceived by Rice University professor Krishna Palem, PCMOS piggybacks on the "complementary metal-oxide semiconductor" technology, or CMOS, that chipmakers already use. This means chipmakers won't have to buy new equipment to support PCMOS, or "probabilistic" CMOS. Although PCMOS runs on standard silicon, it breaks with computing's past by abandoning the Boolean logic that has (thus far) been used in all digital computers. PCMOS instead uses probabilistic logic, a new form of logic developed by Palem and his doctoral student, Lakshmi Chakrapani.

"A significant achievement here is the validation of Rice's probabilistic analogue to Boolean logic using PCMOS," said Shekhar Borkar, an Intel Fellow and director of Intel's Microprocessor Technology Lab. "Coupled with the significant energy and speed advantages that PCMOS offers, this logic will prove extremely important because basic physics dictates that future transistor-based logic will need probabilistic methods."

According to the researchers, silicon transistors become increasingly 'noisy' as they get smaller, but engineers have historically dealt with this by boosting the operating voltage to overpower the noise and ensure accurate calculations. Chips with more and smaller transistors are consequently more power-hungry, they said.

"PCMOS is fundamentally different," Palem said. "We lower the voltage dramatically and deal with the resulting computational errors by embracing the errors and uncertainties through probabilistic logic."

PCMOS was jointly validated by Rice and Nanyang Technological University in Singapore via a joint institute that Palem founded in 2007, the Institute for Sustainable Nanoelectronics.

(from "The Explicit Use of Probability in CMOS Designs and the ITRS Roadmap: From Ultra-low Energy Computing to a Probabilistic Era of Moore's Law for CMOS," Sept. 2005)

The prototypes were application-specific integrated circuits that were designed solely for encryption. Unlike the general-purpose microprocessors that power PCs and laptops, ASICs are designed for a specific purpose, and they are "embedded" by the millions each year in a growing constellation of products like automobiles, cell phones, MRI scanners and electronic toys.

The Rice-NTU team plans to follow its proof-of-concept work on encryption with proof-of-concept tests on microchips for cell phones, graphics cards and medical implants.

Palem said PCMOS is ideally suited for encryption, a process that relies on generating random numbers. It's equally well-suited for graphics, the scientists say, for different reasons:

In a streaming video application on a cell phone, for example, it is unnecessary to conduct precise calculations. The small screen, combined with the human brain's ability to process less-than-perfect pictures, results in a case where the picture looks just as good with a calculation that's only approximately correct.

If PCMOS can slash energy use for embedded ASICs in key devices, the implications are enormous. For consumers, it could mean the difference between charging a cell phone every few weeks instead of every few days. Globally, that mean a smaller carbon footprint for the IT industry.

Palem said he hopes PCMOS technology will enter the embedded computing market in as little as four years. Palem's PCMOS research was funded by the Defense Advanced Research Projects Agency and Intel Corp.

Topics: Mobility, Hardware, Processors

About

Andrew Nusca is a former writer-editor for ZDNet and contributor to CNET. He is also the former editor of SmartPlanet, ZDNet's sister site about innovation. He writes about business, technology and design now but used to cover finance, fashion and culture. He was an intern at Money, Men's Vogue, Popular Mechanics and the New York Daily Ne... Full Bio

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