Intel 'Core' moving to 45 nanometer

Worth reading: I heard little about Intel's processor roadmap from CEO Paul Otellini's appearance at the Churchill Club, but Tom's Hardware has a comprehensive overview of Intel's plans over the next few years, including a new naming convention (Core) and a move to 45-nanometer manufacturing. Written by Patrick Schmid, the extensive article includes the latest Intel processor roadmap for the next three years and asks some important questions in its conclusion:

Given the amount of information that has been available, flanking Intel's 65 nm path, and the fact that the Cedar Mill and Presler engineering samples we happened to preview months ago were working smoothly back then already, the 65 nm chapter seems to be something that Intel might already be closing internally, looking ahead to 45 nm. Today, it is all about squeezing the current manufacturing advantage in order to conquer middle earth and lock down brave AMD into its current 90 nm shire - although it is blossoming and as green as it can possibly be.

At this point it is far too early to speculate about products that could be derived from the upcoming chip designs. The product brand, specifications and pricing are discussed as soon as the silicon can be mass produced; usually at least half a year prior to launching a product. The only fact we know for sure is that the Yonah Centrino processor generation will be named Core, replacing the Pentium M brand in many mobility segments. Yet we don't believe that Intel is going to drop the elfish Pentium brand with the next generation micro architecture.

Then there is the obvious question of how Intel's new technology is going to influence the current balance of power. We can't say yet, because there are too many variables that need to be considered. Will AMD be able to take advantage of DDR2 memory? What is the performance difference between a monolithic multi core and others that are composed by distinct dies, especially when it comes to cross-die cache access? Will there be a clock speed penalty when moving to 45 nm and more cores?