Early photos of AMD Shanghai CPU

Early photos of AMD Shanghai CPU

Summary: Credit: Fuad Abazovic, FudzillaPhotos of CPU-Z highlighting AMD's 45nm Shanghai quad-core processor appeared on Fudzilla last week.  It confirms that AMD's latest processor will have a total of 2 megabytes L2 cache (512 KB per core), and 6 megabytes of shared L3 cache.

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TOPICS: Hardware, Processors
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Credit: Fuad Abazovic, Fudzilla
Photos of CPU-Z highlighting AMD's 45nm Shanghai quad-core processor appeared on Fudzilla last week.  It confirms that AMD's latest processor will have a total of 2 megabytes L2 cache (512 KB per core), and 6 megabytes of shared L3 cache.

By contrast, AMD's 65-nm Barcelona-class processors (Phenom and Opteron quad-core) only have 2 megabytes of shared L3 cache.  The L2 and L3 caches will mostly be exclusive which means they will for the most part not share any content effectively making the cache size larger.

Shanghai's core voltage of 1.15 V is equivalent to the low-voltage edition of AMD's current 65nm quad-core processor Barcelona though it's unclear if this particular Shanghai was operating at normal or low voltage.  According to Fuad Abazovic of Fudzilla, Shanghai is expected to operate above the 3 GHz mark though the CPU-Z photo has the clock speed left out.  We also need to put this in the context of Barcelona having a targeted clock speed of 2.8 GHz according to papers presented at ISSCC 2007 though actual production speeds have yet to exceed 2.3 GHz.

One other interesting note is that AMD's Montreal 8-core processor due out after Shanghai will resort to MCM (Multi Chip Module).  Montreal will be two Shanghai cores glued on to a single processor package.  That means AMD will be adopting the same strategy Intel has been using on its 65nm and first-generation 45nm processors where you take two smaller cores and "glue" them on to a CPU package to have more cores per processor.  Ironically, Intel will be going the opposite direction starting with Intel Nehalem.  Not only will the initial Nehalem-EP 8 MB L3 cache quad-core processor be single-die, but even the much larger Nehalem-EX 8-core processor with 24 MB L3 cache will be single-die.  So in 2009, watch for both companies to reverse their marketing literature touting or disparaging MCM "glue" technology.

Topics: Hardware, Processors

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  • Intel wants to FAIL???

    Didn't Intel see how well that strategy worked for AMD?
    nucrash
    • HUGE difference here

      Nehalem-EX is a replacement for Dunnington which is a replacement for Tigerton. Nehalem-EX is for the high-margin multi-processor platform and you're allowed to have much lower yields when you get at least $500 for the lower-end processor. AMD is competing in the low-margin desktop and mobile space where low-yields is disastrous for margins that are razor-thin to begin with.

      The other big factor is that Intel will be on their second year of 45nm manufacturing and they have confidence in their yield levels. Intel also expects to get relatively good margins with Nehalem-EP because it's a monster performer.
      georgeou
      • While you do have a key point in maturity

        While you do have a key point in maturity of the manufacturing Process at Intel, the possibility of running into a wall could server as a quick catch up point for AMD. In a way, AMD did a lot of heavy lifting early on. They didn't expect the errata problems that they had, nor the problem yield problems.

        While I do agree that both methods have potential and that AMD was at more of a disadvantage, trying to make a precision item using stone age tooling, Intel still could easily trip up and even though AMD is behind without question, the ground work appears to be being laid for AMD to take off or again stumble over their own two feet.
        nucrash
        • Intel's timing on native quad and native 8-core is better

          Intel's timing on native quad and native 8-core is better. Intel also gets some of the highest yields in the industry. You also need to remember that "good yield" is a relative term that must take the selling cost of the chip in to account. Higher selling costs allow you to get away with relatively lower yields.
          georgeou
          • Unless you are Apple...

            Unless you are Apple, you can't really get away with selling a lower performing chip at a higher price. AMD was at least smart on this aspect of pricing the lower performing processors at a competitive price point.

            Although I am surprised that AMD has decided to sell the Black Box CPUs at the same price as their counterparts. Look at Intel and their Extreme Editions and the price premium they ask for them.
            nucrash
  • Intel's "native" 8 core is better

    I'm not a fan of AMD's "glued" 8 core strategy. Clearly, a "native 8 core" is the best thing.

    Observe nature. Is an Octopus two 4 pus's glued together? No. It's one.
    Prognosticator
    • What does that have to do with the price of Pork?

      What does that have to do with the price of pork in Saudi Arabia?

      I liked the idea of possibly comparing something mechanical like a car, but nature?

      Example, Are 2 4 Cylinder engines better than a single V8?
      nucrash
      • The answer is that it doesnt matter

        All this is theoretical. When it comes down to actually buying somthing, the proof will be in the benchmarks.
        cornpie
      • It should bring the price of bacon down

        Actually, I was being facetious to repurpose AMD's earlier claims that "native" is better. I wanted to get a rise of the sensitive AMD guys.

        Having said that, I agree with Ou. Native octal will allow Intel to leap ahead with 32nm much more cost effective than AMD in the next logical core grouping. You can only reasonably do this with 32nm, IMHO.
        Prognosticator
    • AMD may have native 8 core

      Well I'm certainly confused! This article on Fudzilla (orig posted by GIANTOYSTER) suggests that in fact AMD are going for the native 8 core rather than Intel's "glue" approach.

      http://www.fudzilla.com/index.php?option=com_content&task=view&id=6154&Itemid=66

      Interesting that George obtained pics from Fudzilla but missed this info....unless of course the Fudzilla article is completely wrong (it doesn't cite any actual literature - just a highly placed source within AMD). Does anyone have more info on this?
      nickoli0_z
      • No, AMD Shanghai will be MCM

        Most sources are saying it's MCM.

        http://www.theinquirer.net/en/inquirer/news/2007/04/01/amd-travels-from-shanghai-to-montreal

        And whether you agree with Charlie or not, he's got good AMD sources.
        georgeou
      • Also note that Montreal has a quad and octal version

        Also note that Montreal has a quad and octal version. Do you really think they'd make two dies for Montreal? Do you really think they'd disable 4 cores on an 8-core to get a quad? That doesn't sound likely.
        georgeou
  • RE: Early photos of AMD Shanghai CPU

    I think AMD and Intel MCM strategy are different.
    When intel started their MCM products, they were trying to counter AMD multi products, and they did not have anything else handy. At the same time, if it was better to have two native core rather than 2 processors on the same chip, it certainly was better for some markets to have two core rather than one.

    With AMD MCM strategy we are speaking of 8 core, not two or four, which makes a huge difference. Process capable of parallelizing task on 8 concurrent threads are not that common today; as a result as the number of threads increase it becomes more are more difficult to re"ally take advantage of real multicore. If you consider virtrualization infrastructure, you may even have an incentive to go for MCM rather than multicore, as as a reasult you wont share cache between the core, and it will become more insteresting to parallelize ressources, something you do do not do the same way in MCLM and native multicore architectures.

    At the same time technologies Intel began some time ago are becoming mature, so intel will in the next year be capable of delivering large number of native cores. we will have to see the architecture of their cache and memory infrastructure, and how wll its scales with the number of cores.
    s_souche
    • Good points/ green chip

      It's true there aren't many applications that would take advantage of 8 concurrent threads. Virtualization does seem to be a no brainer in this respect. I'm sure there are certain advantages to both MCM and native core architectures, which is why we are seeing a reversal in roles between Intel and AMD.

      Another angle that could be leveraged is the power-saving capability. If there is no load, the power savings on a system capable of powering down a single chip on the package are much higher than what you would experience by powering down a single core.
      jheine
      • Servers naturally take advantage of multi-threads

        Servers naturally take advantage of multi-threads because they have to deal with multiple tasks. It's like saying that 9 women can multitask on the job of delivering 9 babies in 9 months, but you can't get 9 women to deliver 1 baby in 1 month. Well for server applications, you're always delivering multiple babies so to say.

        Nehalem will support 2 logical threads per core. That means Nehalem-EP 2P platforms will do 16 logical threads. Nehalem-EX 8P platforms will do 128 logical threads.
        georgeou
    • No, you do what you can get away with

      Intel can get away with massive 8-core dies because their process is mature enough, clock speed is high enough, and the margins are high enough to justify native 8-core. That makes it worth the performance gain.

      AMD was way late to the table in delivering native quad core and to this day you still can't get it for servers and desktops are stuck at 2.3 GHz. The low clock speeds and low margins make native quad core a raw deal for AMD. Those lower clock speeds more than defeated any performance advantages of native quad core technology.
      georgeou
      • Agreed

        I was just trying to stress that, assuming all technichal issues are resolved, both MCM and native core can make sense in different situations, or more exactly that both ressoruce sharing between core and core specific resources make sens. Native multi core has a clear tendency to share as many ressources as possible between cores, wheras MCM have each DIE having its own ressources.
        s_souche
        • Native is always better IF you can yield high clock speeds

          Native is always better IF you can yield high clock speeds and IF your margins on the chip can justify your yields). AMD couldn't get sufficient yields for high clock speeds and couldn't get a high enough selling price to cover their production costs for Barcelona and it hurt them. Their execs have clearly stated that if they could have done it all over again, they would have gone MCM with Barcelona.

          Intel execs have also clearly stated that native quad core is better but that they weren't confident enough with 65nm and first-year 45nm to produce the desired yields and clock speeds. However, they are confident enough in their second generation 45nm process to do native quad- and eight-core.
          georgeou
  • That is ironic

    So Intel goes to the combined core and integrated memory controller and AMD goes to the multi-cpu's on a chip. Maybe they can just exchange the product literature and tape their respective logos over the old press releases.

    I wonder if AMD's MMC setup will have separate memory controllers for each chip in the package? I wonder if that would affect the scaling decision to go to 8 cores...
    Robert Crocker
    • They split the memory channels

      They let one quad-core die handle one channel and the other quad-core die handle the other channel.
      georgeou