SSE extension wars heat up between Intel and AMD

SSE extension wars heat up between Intel and AMD

Summary: The battle of chips between Intel and AMD has once again found its way to the CPU instruction extensions.  This time it's Intel's SSE4 instruction set versus AMD's SSE4a and recently-announced SSE5 instruction set and it's too late for either company to adopt the other's standard for at least the next 2 years.

TOPICS: Processors, Intel

The battle of chips between Intel and AMD has once again found its way to the CPU instruction extensions.  This time it's Intel's SSE4 instruction set versus AMD's SSE4a and recently-announced SSE5 instruction set and it's too late for either company to adopt the other's standard for at least the next 2 years.  This is following a disturbing trend where Intel and AMD diverge in CPU extensions such as virtualization and it will force software companies to pick sides if they're not willing to support both standards.

So how did this happen?  Intel wouldn't collaborate or give AMD a heads up on the SSE4 instruction set and AMD wouldn't collaborate on SSE5 with Intel.  Even though Intel and AMD have a cross license agreement where the companies have to share each other's technology, that doesn't mean they have to give the other company a heads up and they often don't so they can get a leg up on the competition.

Microprocessors take approximately five years to go from concept to product and there is no way Intel can add SSE5 to their Nehalem product and AMD can't add SSE4 to their first-generation 45nm CPU "Shanghai" or their second-generation 45nm "Bulldozer" CPU even if they wanted to.  AMD has stated that they will implement SSE4 following the introduction of SSE5 but declined to give a timeline for when this will happen.

This will be the first time AMD has marketed their processor extensions with the "SSE" nomenclature since "SSE" has been exclusively used by Intel.  If that wasn't confusing enough, AMD will also be launching "SSE4a" (Not to be confused with Intel's SSE4) in September 2007 with their quad-core Opteron server codenamed "Barcelona" or "K10".  Later in 2009, AMD will launch a second-generation 45nm CPU based on a completely new architecture called "Bulldozer" which will include the recently announced SSE5 instruction set.

On Intel's side we have SSE4.  The first version which is referred to as SSE4.1 in some of Intel's documentation will be due in November 2007 in Intel's Penryn processors.  The second version referred to as SSE4.2 will be due in the second half of 2008 with Intel's Nehalem processor which is a brand new CPU architecture.

AMD is claiming that their SSE5 instruction set will result in 30% faster on video encoding tasks and as much as a 400% increase in certain encryption tasks.  Intel's SSE4.1 enabled Penryn engineering samples have shown more than a 100% increase in video encoding tasks compared to current generation Core 2 processors at the same clock speed using early SSE4-enabled DIVX 6.6 alpha code.  SSE4.2 among other things will help checksum processing which will be beneficial to gigabit or 10-gigabit network processing.

Obviously from a user's perspective they would want a chip that combined the video encoding and network processing capability of Intel's SSE4 along with the encryption capability of AMD's SSE5 but that won't happen any time soon.

Topics: Processors, Intel

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  • Nicely Done!

    D T Schmitz
    • Thanks :)

      • good article

        more like this please, less of the fud fighting.
  • Hey Nice Job

    Did you know that an AMD(ATI)1950 video card can encode a 700mb file from avi to DVD in 5 minutes,I fold on the gpu client Stanford says the GPU client is %40 faster on a 2900XT,since it uses the same thing the encoding does,I assume it will do that %40 faster 2 :D
  • Message has been deleted.

    • Somebody cares?

      Not you?
      D T Schmitz
  • AMD's bifurcation of x86 instructions will hurt them most

    I can see why AMD would want to create their own instruction set extensions. For one, the hey day of sifting through Intel's trash bins for design blueprints and copying it 12 months later is simply gone. AMD is left to innovate - which is good for them, good for the industry. The gotcha, is when they take on Intel's instruction set compatibility. They simply do not have the ecosystem capabilities to get the support they need.

    Forcing customers, ISV's and content owners to now make a choice on which instruction set to support for the long haul is suicide. The 3DNow extensions were an utter failure, as an example. I think AMD is taking the bait that Intel has laid down. However, I don't see what else AMD can do so it's not quite monday to assert a "monday morning quarterback" assessment. What is true is that this bifurcation of the x86 instruction will simply just burden the developer community until they end up choosing one - Intel, of course. Remmeber the "nobody ever got fired by choosing IBM"? Well, it will ring true here.
    • SSE5 doesn't overlap much with SSE4 so it should be OK

      SSE5 doesn't overlap much with SSE4 so it should be OK because all AMD needs is go get Windows and Linux to support the crypto features. You have to remember that Microsoft was pivotal in helping to force Intel in to supporting x64 rather than create a whole new 64 bit extensions for x86 or push Itanium. The video stuff overlaps a bit and it sounds like SSE4 does a much better job at video.

      3DNow did overlap with Intel?s SSE features and software vendors figured it would be easier to write for SSE. The fact that AMD added SSE meant death for 3DNow. Like I said, you will want the crypto features of SSE5 in addition to the video encoding of SSE4.1 and network offloading of SSE4.2 so I think SSE5 should be OK.
      • IDF is less than a month away

        I would wait until then to make any comments. At last IDF Intel disclosed SSE4 at a high level. They way just disclose their next set of instructions at this one.

        It would appear that AMD is trying to get ahead of Intel's IDF just like Intel's going to thwart AMD's Barcelona launch by launching its Caneland systems first.

        Maybe AMD knows something we dont.
    • AMD's?

      Both vendors are trying to have a leg up on the other by offering instructions sets before the other. Intel has, and will continue to have a major manufacturing advantage over AMD. The only way AMD managed to take the lead with the Athlon 64 and X2 product lines was because the core design was more effective. If AMD just waited for their cross licensing agreement, and implemented Intel's new instruction set after it had already been an available to Intel it could be a huge disadvantage.
      This is almost exactly like the whole Blu-Ray and HD DVD situation. There were talks entertaining the possibility of combining into a single universal new high definition standard, but Toshiba currently holds a strong hand on DVD royalties and didn't want to let go of that going into the next generation formats. This move is more due to Intel's playing strategy than AMD.
      The simple fact of the matter is that because of the fierce competition customers and ISV's were inevitably going to be faced with these kinds of choices. Its unrealistic to expect all of the consequences of this type of a battle are going to be as nice for the consumer as the price war has. I really think your jumping the gun on assuming that Intel is the default choice. The new instruction sets are only going to be running on their bran new product lines, so their success will play a major role. Intel's current installed base, existing Core 2, Xeon, and previous product lines don't factor in.
    • Damn you...

      For being right. And it sucks.
  • Congrats, stick to the facts more often

    I'll echo other's sentiments, George, when you stick to just reporting facts, people enjoy it more.

    Now, as for SSE5, I noticed that AMD & Intel were on diverging SSE paths too, when I first heard about the new extensions. The biggest difference between SSE5 and previous generations of SSE is that AMD introduces 3-operand instruction sets to it; this brings it closer to the world of RISC processors, which have had 3- and 4-operand instructions for years. Another interesting distinction is that SSE5 seems geared to taking advantage of an onboard GPU. One of the features they introduced into SSE5 is a 16-bit "half-precision" floating point data type; something that was not available in the CPU world before, but something very common in the GPU world. Such a small floating point type would be super-fast to calculate on a GPU. Since SSE5 is not available till AMD's Bulldozer generation, the generation which will introduce their Fusion of CPU and GPU technology, it seems more than coincidental that they are making it easier to transfer data between the GPU and the CPU.

    Intel on the other hand, since it's not nearly as far along as AMD at integrating a GPU into the CPU, it will be gearing it's SSE4 at taking advantage of its own CPU without GPU resources.

    Another thing, I doubt that many of these additional instructions will be used within actual applications. I think most of it is being geared towards inclusion in the next generation of Microsoft DirectX drivers.
  • Proof you should cater to your listeners

    George, take a look - more than 1/2 of the responses have nothing to do with the article. It goes to show that you have to suck up to the loser AMD community even at the expense of skewing the facts.

    The point is, your readers are technical and like your fact base opinions, BUT, they are also emotional human beings. Please take more opportunity to throw AMD a bone here and there. We understand and will simply know what you are doing.. wink wink.
    • No bone for you this time

      I only see you helplessly trying to stir up a flamewar and considering George on your side and that tells a lot about what kind of audience (or should I say "worshippers"?) this blog has attracted over time...
  • RhetoricPolice + No Axe to Grind = Intel

    Go post with fellow Intel colleagues like No_Axe_to_Grind on some Intel intranet site, okay? You guys are Intel trolls on George's blog.
    • Well, if I am

      included with company like George I'll take that as a compliment. Thanks little fella.
    • Do you have a disagreement?

      Do you disagree or are you just wasting people's time? AMD has a history (now) but its foundation is built upon duplication of other people's R&D. I found out the hard way when the cheaper 486 cpus I built my systems with (years ago) were having problems. Those days may be long gone, but their memories remain. I read rhetoricpolice's post and yours, and you are the one posting like a child... all insult and no value whatsoever. If you disagree at least have the maturity to say "they stopped copying a long time ago".. or SOMETHING.
  • Interesting however,

    Obviously there is a move to harness the CPU for video rendering/encoding, but I have to wonder if this wouldn't be better to off load to the GPU. I can understand why Intel might go this way but with AMD now owning ATI I am not so certain it works as well for them.

    Perhaps in a desktop PC, marrying the GPU and CPU is in AMDs future. Heck, with multi-core CPUs (you did't think they were stopping at 4 did you?) it may make a lot of sense. I suspect in the near future "video processing/rendering" is going to be a big selling point for quad-core PCs to "Joe Average".
  • Thumbs up on this one!

    I don't usually give thumbs up easily, especially to George. This article was to-the-point and very beneficial. Why can't we see more stuff like this? Real-world stuff, that has true impact?

    I agree with George, in that this is a problem. While the cross-license agreement is nice, the politics in this mess are holding back software development on a very HUGH scale. Bad Intel! Bad AMD! WAKE UP!
  • AMD Guy now

    I used to be a strict Intel guy but after building a few boxes with an AMD processor I really do this AMD got their stuff together now.
    Asterisk Runs great on AMD By the way.