IBM integrates graphene and Racetrack with CMOS tech
IBM has successfully integrated two emerging technologies with the CMOS manufacturing technology, the company has said.
Complementary-symmetry metal–oxide–semiconductor (CMOS) technology is used in the manufacturing of most electronic equipment. On Monday, IBM told an IEEE International Electron Devices meeting that it had demonstrated CMOS compatibility for its Racetrack memory technology and for graphene.
"Today's breakthroughs challenge the status quo by exploring the boundaries of science and transforming that knowledge into information technology systems that could advance the power and capability of businesses worldwide," IBM Research science and technology chief TC Chen said in a statement.
Racetrack is an experimental, spintronics-based memory technology that IBM first showed off in 2008, claiming it would result in even faster and denser memory than that possible using flash technology. On Monday, IBM showed off the first Racetrack memory device integrated with CMOS technology on 200mm wafers.
"The researchers demonstrated both read and write functionality on an array of 256 in-plane, magnetized horizontal racetracks. This development lays the foundation for further improving Racetrack memory's density and reliability using perpendicular magnetized racetracks and three-dimensional architectures," IBM said in its statement.
Graphene is a wonder substance, composed of atom-thick carbon lattices, that many see as a potential successor to silicon — silicon electronics will not be able to comply with Moore's Law for much longer, as they stop working at a thickness of less than 2nm.
IBM has now shown off its first CMOS-compatible graphene device: a frequency multiplier. The company says the integrated circuit "can advance wireless communications and enable new, high frequency devices, which can operate under adverse temperature and radiation conditions in areas such as security and medical applications".
The IC is operational up to 5GHz and stable up to 200 degrees Celcius, IBM said, although it acknowledged that "detailed thermal stability still needs to be evaluated" before it can be sure the device would be usable in high-temperature environments.
"New architecture flips the current graphene transistor structure on its head. Instead of trying to deposit gate dielectric on an inert graphene surface, the researchers developed a novel embedded gate structure that enables high device yield on a 200mm wafer," IBM said.
The company also showed off an advance it has made with carbon nanotubes. This nanomaterial is already lined up to be used in devices ranging from solar cells to displays.
IBM's researchers said on Monday that they had demonstrated the first carbon nanotube transistor with sub-10nm channel lengths — a scale at which silicon struggles to perform well. According to the researchers, the demonstration proves that carbon nanotubes "can provide excellent off-state behaviour in extremely scaled devices".