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The pieces of the K Computer.
The K computer uses a "SPARC6 VIIIfx" CPU designed and developed by Fujitsu using 45 nanometer process technology. 80,000 of these chips are expected to be housed in the completed project which is expected to top the 10 petaflop barrier.
Six I/O system boards are installed in each rack. Each board contains 4 SPARC64 VIIIfx CPUs with 8 cores integrated into each chip. The board delivers a performance to power ratio of 2.2 gigaflops per watt.