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Gallery: Intel goes 3D with Tri-Gate transistors

by Andy Smith  |  May 4, 2011 10:32am PDT  |  Image 1 of 5

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Intel reveals what will power its next-generation of chips, the 3D Tri-Gate transistor.  Intel says the increased performance and reduced power consumption is the future of 22nm-based devices from handhelds to cloud-based servers.

Larry Dignan has more about the chip that Intel claims will keep Moore's Law rolling.

This image shows the vertical fins of Intel’s revolutionary tri-gate transistors passing through the gates.

Credit: Intel

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RE: Gallery: Intel goes 3D with Tri-Gate transistors
WoofboyX 6th May 2011
mick@... We already see this logic employed in other technologies. For example, on early model bus connectors (like the old ISA pc cards) we saw 2 states, on or off, to transmit data. Later we moved to cards that used +, - and neutral. This effectively inscreased the bandwidth by 50% as we could now convey 3 conditions of information in the media that previously had 2.
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Please say something about how this impacts processing power.
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@shrabinski@...

I would imagine it decreases the distance between some pairings of transistors, it might even allow for different layers to have different functions and would certainly allow for more transistors to occupy the same amount of 2d real estate, sort of like building a high rise office building instead of a sprawling complex.

I wonder if this would allow Intel to build different models of chips off a common first layer? Perhaps in the future it could lead to a hybrid chip with cpu,ram and video/audio layers, all customizable.
RILIB is correct. Currently chips are made in two dimensional form so that the width of the gate (in nm) is limiting factor of the transistor which about 32-nm. Making the gate vertical and reducing it to about 22-nm will allow more transistors in the same two dimensional space. One question is heat dissipation from this "chunk" material.
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Miniaturisation is amazing - whatever the outcome
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So now when I ask a computer a yes or no question, it can reply with maybe.
@ScratchCA I'm pretty sure these were developed to support the 3D TV scam...
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@ScratchCA... i was kinda wondering the same thing. i was always understanding that everything worked with the 'yes' or 'no' as well. now there is a 3rd variable? i only understand the bare basics, so...easy for me to be wrong......
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Shoter paths per surface area
gardoglee 4th May 2011
One of the best parts of this innovation would seem to be that there is a shorter current path per surface area of the junction. The resistence of a path increases with length, so the heat generated increases with length. THe surface area is where that heat has to go. With less length per surface area, less heat is produced with the same dissipation area. This might sound great for cooling, but I would think the real benefit is in better signal to moise ratios from the reduced heat, and hence their statement that they can not only recude power but also improve performance at the same time. It is still bi-state/yes-or-no, but a more stable state with less power/heat. Not to mention that shorter paths are potentially faster, although there is a lot of other stuff which influences how fast a device can switch and settle.
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i want to know how these structures are formed. and how the structures illustrated actually interact with electrons to produce the "transistor" effects desired. these structures shown remarkably small and fragile...are they "grown" as a crystal into the required shape or are there actual tools and dies etc. for such things..? now my ignorance is showing in front of all as well... thankyou in advance for taking the time to enlighten me...
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@puresilver1@... try this for some education: http://www.youtube.com/watch?v=aaSmQVjJprg
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this is a little funny
inertman@... 4th May 2011
since we have always read about the size of this equipment in 3 dimensions, that now suddently the 3rd dimension is 'groundbreaking'....
while i get the reasons for this 'advancment' it isn't really 3d as opposed to any previous space occupying piece of matter anywhere in existance.
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Exactly....
pmcm 5th May 2011
@inertman@... If this is 3d, what was the old one? They may have restructured the transistor but the old one was still 3 dimensional. I'm still waiting on the 3d for my 2d television.....
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Ground breaking would be building in the 'fourth' dimension wink
we already live in a three dimensional world.
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yeah, did some more reading on it earlier today. the article does seem a little misleading at first, but, after a bit, it does come to light that the whole 3d thing is actually just doing what should be the logical step. like they have been saying, they built upwards, enabling them to use the sides, tripling the transistor useage per chip. they had to wait for materials and tech to catch up, but, this does make logical sense. very cool none the less.
With tri state we can get -1, 0, +1
an example
you have 8 coins, 1 is a forgery and has a different weight from the others. With three weighings on a beam balance identify the forgery.
@mick@...

Weigh 1,2X3,4 if equal then
weigh 1,2X 5,6 if equal then
weigh 1X7 if equal then 8= forgery, if unequal 7=forgery
if 1,2X5,6 is unequal then
weigh 1,5X4,6 if unequal in same manner 6 is forgery, if unequal in different manner 5 is forgery

or
weigh 1,2 X 3,4 if unequal , forgery is in that group then
weigh 1,5 X 3,4 if equal 2 is forgery,if unequal then
weigh 1,3X 5,6 if equal then 4 is forgery, if unequal in same manner as 2nd weighing 1 is forgery, if unequal in a different manner 3 is forgery.
mick@... We already see this logic employed in other technologies. For example, on early model bus connectors (like the old ISA pc cards) we saw 2 states, on or off, to transmit data. Later we moved to cards that used +, - and neutral. This effectively inscreased the bandwidth by 50% as we could now convey 3 conditions of information in the media that previously had 2.
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isn't this what hypercubes are all about. I have read about hypercubes long ago. Is it just that it became production ready now??

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