...that the majority of those servers are running five, six or seven applications. [Large web companies] have web applications upfront, [along with] in-memory databases, database and data mining.
When you open up your Facebook page, it goes to a web app server that has all the PHP on it and then it sends tens of hundreds of requests to other servers, each one handling a piece of it. It then aggregates all this data and sends it back to you. All of this happens in milliseconds.
To them, the place for Tilera or ARM is: "How can I make this server cheaper, lower power and even more disposable? If one fails, no problem; I can keep marching."
What are the distinguishing features of Tilera's iMesh architecture in terms of efficiency?
If you look at the bus, to get the bandwidth on there you have to make [the bus] very wide. Then you need to drive [your data] very fast and drive [it through] long wires. That gives you more power consumption than if you have a mesh of very short wires, point-to-point. iMesh is the wires, which is very cheap. Plus, you don't have to drive them very fast, because you have so many of them.
The other thing about iMesh is distribution. We have distributed everything on the chip. For example, we don't have the L3 cache [like Intel]. We have distributed the cache along the whole chip, so you don't have to light up a big area of the cache when you want to access it, as it's [made of] smaller pieces.
Think of yourself in New York and imagine there's only one big grocery store in Midtown, versus having a hundred different grocery stores spread throughout the city. Think of how much gas you will take to access that, versus the other.
Why hasn't Intel made a similar product?
To be able to put so many cores on a single chip that will be an x86-compliant core would be very power consumptive — you saw Larrabee, right? Larrabee was [Intel's attempt] to win in the graphics market, and they cancelled it because they were late.
Intel serves the whole market with almost one product. You have one core, one architecture — Sandy Bridge or Nehalem or Westmere.
Intel serves the whole market with almost one product. You have one core, one architecture — Sandy Bridge or Nehalem or Westmere or whatever. Take [that] core, put that by any cache, add QPI [Intel QuickPath Interconnect], make that chip and then it's a server chip. Take the QPI out, reduce the cache — now it's a desktop chip. Completely slash the cache out, now it's a Celeron chip.
But it's the same exact core with varying frequencies and maybe some features like virtualisation enabled or disabled. So for them to say, "We're going to abandon this tick-tock [development process] and now we're going to have a parallel architecture that will be a different core and we're going to do 50 cores on a chip and we'll target these markets and we will be competing with the same products that we're offering here..." — they'll have to see a very, very important reason to do that.
On the technical side, we've spent the last 15 years — not Tilera but through our researchers at MIT — to solve a lot of these problems, and we have a lot of the IP in the area. Intel's pretty smart, and I'm sure they can develop something on their own. But there are a lot of pitfalls they have to overcome to get to where we're at right now. We'll have some advantage over them.
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