hypertransport
4 ResultsDictionary
HyperTransport
A high-speed interconnection architecture between integrated circuits, introduced in 2001. Code-named Lightning Data Transport and developed by AMD and others, the HyperTransport I/O Link...
Dictionary
Definition: HyperTransport
A high-speed interconnection architecture between integrated circuits, introduced in 2001. Code-named Lightning Data Transport and developed by AMD and others, the HyperTransport I/O Link Specification defines a protocol and electrical interface between the CPU, memory and peripheral devices.
Since its introduction, HyperTransport's maximum aggregate bandwidth of 32-bit links progressed from 12.8 to 41.6 Gbytes/sec. Version 3.0 also added dynamic link splitting under software control. Called "Un-Ganging," it enables a single unidirectional link to be split into two; each at half the original bit width. HyperTransport (HT) was designed to be fully compatible with legacy PCI (running at 33 or 66 MHz) plus PCI Express and PCI-X technologies. For more information, visit the HyperTransport Consortium at www.hypertransport.org.
HYPERTRANSPORT VERSION
HT 1.x HT 2.0 HT 3.0
Feature (2001) (2004) (2006)
Clock speed 800 MHz 1.4 GHz 2.6 GHz
Bandwidth
(GB/sec) 12.8 22.4 41.6
Hot pluggable No No Yes
Un-Ganging No No Yes
THIS DEFINITION IS FOR PERSONAL USE ONLY
All other reproduction is strictly prohibited without permission from the publisher.
© 1981-2010 The Computer Language Company Inc. All rights reserved.
Sponsored White Papers, Webcasts & Resources
-
Download a Free Trial of Diskeeper 2011 EnterpriseServer
Discover the only solution specifically designed for your largest servers, the ones that must be kept online with volumes up to 20TB and millions of fragments. Achieve peak performance 24-7 with...
-
AMD Shanghai won't get HyperTransport 3
HyperTransport 3 which was once slated for AMD's Barcelona server processors seem to be delayed again on Shanghai until some time in 2009 when it finally arrives for the "Montreal" quad- and...
-
Details of Intel CSI "QuickPath" released
Three weeks before Intel's fall IDF (Intel Developer Forum), analyst David Kanter of Real World Technologies has compiled and released a detailed paper of Intel's next CPU memory architecture...
-
New bus standards--what to expect
As older standards such as VL Bus and EISA become obsolete, new bus standards are being developed to keep pace with increases in bandwidth. TechRepublic's James McPherson explains current bus...
-
Amid CPU hype, I/O is key at IDF
Don't let the flurry of CPU announcements at the Intel Developer Forum blind you to other important initiatives. Bill O'Brien looks at the implications of 3GIO and how it may affect enterprises.
Additional Results
-
AMD Shanghai won't get HyperTransport 3
HyperTransport 3 which was once slated for AMD's Barcelona server processors seem to be delayed again on Shanghai until some time in 2009 when it finally arrives for the "Montreal" quad- and...
-
Details of Intel CSI "QuickPath" released
Three weeks before Intel's fall IDF (Intel Developer Forum), analyst David Kanter of Real World Technologies has compiled and released a detailed paper of Intel's next CPU memory architecture...
-
Sun frowns on HyperTransport expansion
A leading AMD proponent rejects technology that could increase the importance of communication tech built into AMD chips.
-
HyperTransport Consortium adds new members
Supercomputer maker Cray, plus six others, join the likes of AMD, IBM, Cisco and Apple to help spread the speedy technology.
-
HyperTransport group ups data transfer speeds
A new version of the HyperTransport specification, which debuted Monday, is expected to boost performance in PCs and communications equipment over the next year.
-
Chips to ride on faster HyperTransport
The HyperTransport Consortium announced version 2.0 of the HyperTransport standard which is touted to speed PC-peripheral connections by 75 percent.
-
IBM, TI and others go for HyperTransport
Big Blue, Texas Instruments, EMC and four others are joining the HyperTransport consortium, a move that will likely expand the places where the chip-to-chip connection gets used.
-
Macs to get a big lift with HyperTransport
Apple Computer plans to discuss at an upcoming conference how it will use the high-speed chip-to-chip communications technology in its future desktops, sources say.
-
New bus standards--what to expect
As older standards such as VL Bus and EISA become obsolete, new bus standards are being developed to keep pace with increases in bandwidth. TechRepublic's James McPherson explains current bus...
-
Amid CPU hype, I/O is key at IDF
Don't let the flurry of CPU announcements at the Intel Developer Forum blind you to other important initiatives. Bill O'Brien looks at the implications of 3GIO and how it may affect enterprises.
-
HP hitches up HyperTransport
Hewlett-Packard has licensed API NetWorks' HyperTransport designs for high-speed connections between chips, API said Monday. The technology, originally created at Advanced Micro Devices, is...
-
Chipmakers embrace HyperTransport standard
More than a dozen companies have licensed the HyperTransport standard for exchanging data between semiconductors.
-
Xilinx takes a ride on HyperTransport
Xilinx licenses communications chip design from API Networks in a deal that highlights the growing adoption of AMD-designed HyperTransport in the networking market.
-
AMD's HyperTransport: Souping up chip speed from the inside
Advanced Micro Devices aims to increase the performance of computing devices with an internal connection that speeds flow of data between chips.
The best of ZDNet, delivered
ZDNet Newsletters
Get the best of ZDNet delivered straight to your inbox




