Speaking at the International Supercomputer Conference in Hamburg on Monday, Intel vice president and head of datacentres Kirk Skaugen gave first details of Many Integrated Core (MIC) and its initial appearance in the Knights Ferry and Knights Corner platforms.
Skaugen said it combined standard Intel Architecture x86 programming and memory model with many cores and "many, many more" threads. It will be programmed using new versions of Intel's standard development tools and is intended for classic high-performance computing tasks in engineering, research and science. Evaluation hardware and software is already in use at Cern.
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