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Rupert Goodwins' Diary

Thursday 30/3/2006Despite Intel's best efforts to exorcise it with large wodges of cash, the Curse of Itanium still stalks the land. The latest "that can't be good" news is that eight Itanium engineers have jumped ship and doggy-paddled to the good vessel AMD.
Written by Rupert Goodwins, Contributor

Thursday 30/3/2006

Despite Intel's best efforts to exorcise it with large wodges of cash, the Curse of Itanium still stalks the land. The latest "that can't be good" news is that eight Itanium engineers have jumped ship and doggy-paddled to the good vessel AMD. Chief among the deserters is Intel fellow Samuel Naffziger, director of Itanium circuits and technology. He joined Intel in 2005 when the company hired Itanium designers from HP, where Naffziger had led the Itanium design team for eight years.

At the Intel Developer Forum, swashbuckler-in-chief Pat Gelsinger made frank with his explanations of how Itanium had gone wrong, namely having two separate design teams at HP and Intel doing things two different ways with two different sets of tools. That realisation was behind the merging of the teams under the Intel roof: there's more to mergers than geography, though. The HP culture isn't the Intel culture — whether it was that or more significant disagreements over where the design was going and how, nobody will say. Or it could just be a straight poach — eight years on Itanium will probably make designing a five transistor medium wave radio seem attractive.

One thing AMD is not doing is building a new Itanium: if only it were, then Intel would feel a lot more confident that it might one day see a sniff of profit from the beast. AMD is most certainly working on a new server architecture, which is most likely what the Naffziger Gang has been recruited for, but as Intel itself has proved with its own Core Architecture there's still a lot of performance to be squeezed from the old school x86 instruction set. Which is good for AMD, because that means it can get on building silicon while relying on other people producing the tools to program the stuff.

The big challenges for increased server performance in the future are how to write software that runs efficiently across as many threads as possible, how to get data in and out without stalling, how to switch more transistors without melting, and how to make the best use of existing technology without being locked into a Vista-like compatibility prison. None of these require a breakaway instruction set: they need experience, brains and good ideas.

AMD's just scored a large collection of exactly that. More fun to come!

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