IBM, Sony and Toshiba will reveal details on the new Cell processor architecture for the first time later on Monday at the International Solid State Circuit Conference (ISSCC) in San Francisco.
Trailed as a 'supercomputer on a chip', the Cell is known to encompass many innovations in software and hardware design and will be the chip at the centre of next year's Sony Playstation 3. IBM has also said that a one-rack server using the Cell processor architecture could achieve speeds of 16 teraflops (thousand billion mathematical operations a second): such a machine would be one of the top ten fastest computers in the world.
The initial design to be discussed at the ISSCC is expected to have a 4.6 GHz clock frequency and on-chip DRM, and will be based on a 90nm silicon-on-insulator (SOI) process. IBM will produce chips later this year at its East Fishkill fabrication plant: its first Cell-based product will be a workstation co-designed with Sony. Toshiba has said it will produce a high definition television using the Cell in 2006.
The Cell processor is a multi-core design with one core, thought to be based on PowerPC architecture, coordinating eight general purpose attached processing units. These are vector processors capable of running multiple instructions simultaneously, and are tightly coupled to on-chip memory: there's also a 5.6 Gbps bus to external devices.
In use, the coordinating processor allocates software processes to the APUs which will ideally run them entirely in local memory at full clock speed. Software for the chip will be written to take advantage of this architecture, which is innately parallel, virtualised and grid-like.