Images: Intel's 45-nanometer process

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  • Intel's 300-millimeter wafer

    Intel's 300-millimeter wafer

    A 300-millimeter wafer containing test SRAM chips made on the 45-nanometer process. The manufacturing technique will be used in mass manufacturing late next year. The test chips typically come out just under two years before mass manufacturing.

    Caption by: Bill Detwiler

  • Intel's 45-nanometer test chip

    Intel's 45-nanometer test chip

    It can hold 153 megabits of memory. The top third consists of memory cells. The middle section contains circuits for input/output and other functions. Those transistors are made so that Intel can test how different transistors come out on the new process. The bottom part is a tester.

    Caption by: Bill Detwiler

  • A memory cell made at 45-nanos

    A memory cell made at 45-nanos

    A close up of an Intel memory cell made with the 45-nanometer process. Those horizontal lines are transistor gates.

    Caption by: Bill Detwiler

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Moore's Law is on track, says Intel, and it shows a clutch of 45-nanometer chips to prove it.

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Intel's 300-millimeter wafer

A 300-millimeter wafer containing test SRAM chips made on the 45-nanometer process. The manufacturing technique will be used in mass manufacturing late next year. The test chips typically come out just under two years before mass manufacturing.

Caption by: Bill Detwiler

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