How IBM plans to change the chip world
That day is not far away. IBM Corp.'s Enterprise Systems Group already has working prototypes of its forthcoming Power4 processor, a chip that officials say will boost the performance of high-end servers used for Web hosting and e-commerce.
The Power4 was designed as a server chip for very expensive hardware. But IBM (ibm) executives say the new line might ultimately have a greater impact on personal computing than the recently announced 1GHz desktop PC chips from Advanced Micro Devices Inc. (amd) and Intel Corp. (intc), which last week announced their new entries.
"Products like Power4 will have much more of an influence on you as a consumer than having a desktop running at 1GHz," said Dr. Joel Tendler, a senior technology architect with IBM's Enterprise Systems Group.
IBM's Power4 is unique in that it can offer multiprocessing from the confines of a single chip. Power4 chips will combine two processors on a single die -- the slab of silicon on which the processor is built. Power4 is also a 64-bit chip, meaning it processes data in 64-bit chunks, unlike most desktop chips, which tackle data in 32-bit chunks.
Instead of raw clock speed, he said, "the amount of bandwidth necessary just to accommodate (a site like the Olympics) is going to be high."
Analysts agree that bandwidth, not clock speed, is more important for server performance.
"There's clock speed and then there's the power of the computer," said Fred Ziebler, president of Pathfinder Research. "You can compare (Power4) to Pentiums in clock speed, but in reality it's much more powerful."
Chip designers say a fast processor isn't much good if a system fails to keep up and feed enough data. Power4's architecture is designed to keep its twin chips well-fed, with an architecture that supports a large amount of on-chip Level 2 cache and bus speeds of up to 500MHz between multiple Power4 chips, system input/output and memory.
Level 2 cache increases performance by holding data very close to the chip so that it does not have to reach out across a bus to retrieve it. The buses, which provide data pipelines between the processors or the processors and memory, can carry up to 100GB of data per second.
A single Power4 chip will be made up of 170 million transistors, a large amount of which will probably account for Level 2 cache. It will begin manufacture on IBM's 0.18-micron copper manufacturing process, meaning the 170 million transistors will be linked with copper metal interconnects of 0.18 micron in length. (A micron measures about one-millionth of a meter.) Desktop chips, such as Intel's Pentium III, currently use aluminum interconnects.
Copper's advantages over aluminum, among other types of interconnects, are lower resistance, which leads to greater performance, and lower power consumption. Power4 also sports a new design technique called silicon on insulator, or SOI, which basically cuts down on the amount of capacitance inside the processor, also increasing performance.
Power4 is on schedule to ship in the second half of next year in IBM's RS/6000 Unix servers and its AS/400 servers for small and medium-size businesses running Unix or Linux. Early versions of the chip have their processor cores running at 1GHz each. However, analysts expect the chip to debut at 1.1GHz and scale to 2GHz on a 0.13-micron process.
The chip will compete with other high-end, 64-bit processors, including Intel's Itanium and Compaq Computer Corp.'s (cpq) Alpha.
AMD is also likely to go down a similar route. As it refines the techniques used to manufacture the Athlon, AMD sees the potential for single-chip multiprocessing, where two Athlon processors are placed on the same chip. This technology will likely show up in AMD's own 64-bit chip, code-named Sledgehammer.
The Power4 will also be available in AS/400 systems for small and medium-size businesses, IBM said.