Intel launches world's first 45nm processors

Updated 5:00PM - Intel extended its lead in microprocessors today by launching the world's first 45nm microprocessors.  Along with the new "Penryn" 45nm processors being launched today, Intel is also launching the "Seaburg" chipset designed for the HPC (High Performance Computing) chipset which is timed perfectly with this week's supercomputing conference.  The Seaburg chipset coupled with the new CPU was codenamed "Stoakley".  Both the new processor and chipset will officially be called the 5400 series processor and chipset.

The new 5400 series processor is built on a brand new 45nm process using High-K dielectrics and dramatically cuts power consumption.  Its key performance enhancements over the previous generation Intel 65nm processors are higher clock speeds, 50% more level-2 cache, enhanced SSE3, brand new SSE4 instruction set which can double the performance of video encoding, enhanced dividers.  The following is a table of the new server and HPC workstation processors launched today.  Note that the FSB 1600 models are designed for the new 5400 series chipset whereas the FSB 1333 and 1066 models will work on the existing 5000 series "Blackford" chipset which Intel launched back in mid 2006.

Intel Processor	Clock	L2 Cache	FSB	TDP	Cores
X5482a	3.20	12	1600	150W	4
X5472	3.00	12	1600	120W	4
E5472	3.00	12	1600	80W	4
E5462	2.80	12	1600	80W	4
X5460	3.16	12	1333	120W	4
X5450	3.00	12	1333	120W	4
E5450	3.00	12	1333	80W	4
E5440	2.83	12	1333	80W	4
E5430	2.66	12	1333	80W	4
E5420	2.50	12	1333	80W	4
E5410	2.33	12	1333	80W	4
E5405	2.00	12	1333	80W	4
X5272	3.40	6	1600	80W	2
X5260	3.33	6	1333	80W	2
E5205	1.86	6	1066	65W	2

The new 5400 series chipset supports 128 GBs (16 x 8 GB DIMMs) of Fully Buffered DDR2-800 whereas the older 5000 series chipset only supported Fully Buffered DDR2-667.  The new chipset also features a 50% larger 24 MB snoop filter which allows for more efficient cache indexing.  Another key feature that is interesting to the HPC market is the inclusion of PCI-Express generation 2.  PCI-Express generation 1 was throttling the performance of high-end InfiniBand adapters because of a lack of bandwidth and PCI-Express generation 2 solves these problems.

Another chipset that received very little press and attention is the new "San Clemente" chipset which is part of the "Cranberry Lake" platform.  This new chipset uses registered DDR2-533 or DDR2-667 memory and has a peak Front Side Bus of 1333.  It will have a peak memory capacity of six double-rank DIMMs which realistically means you can put 24 GBs of RAM in the system using six 4GB DIMMs.  San Clemente uses the ICH9R south-bridge for storage which is the same storage controller used in the new Intel 3-series desktop chipsets and it has even better storage performance than the already-fast ICH8R chipset.

The new San Clemente chipset also lacks PCI-Express generation 2.  Despite the shortcomings of San Clemente compared to the high-end Seaburg 5400 series chipset, it has some phenomenal performance/watt characteristics when it's coupled with the 3 GHz 80W TDP chips and less power hungry un-buffered DDR2 memory.  The tradeoff here is that you only get 3/8th the memory capacity of the Seaburg chipset but it may be enough for most applications.  This makes the Cranberry Lake platform ideal for very high density blade solutions where performance/watt and reasonable power ceilings per rack are paramount.