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Intel's 'tick tock' Penryn shrinking chips

Intel is ramping up its 45-nanometer generation of chips, which will result in smaller, faster and more energy efficient chips. Tom Krazit covers the announcement: The Penryn chips are the first iteration of the new manufacturing strategy outlined by [Intel CEO Paul] Otellini earlier this year.

Written by Dan Farber, Inactive Jan. 27, 2007 at 7:41 a.m. PT

Intel is ramping up its 45-nanometer generation of chips, which will result in smaller, faster and more energy efficient chips. Tom Krazit covers the announcement:

The Penryn chips are the first iteration of the new manufacturing strategy outlined by [Intel CEO Paul] Otellini earlier this year. Intel wants to introduce new chip microarchitectures and manufacturing technologies on a regular two-year cadence, which the company refers to as the "tick-tock" strategy.
Penryn is essentially a shrink of the Core 2 Duo chips, with a few extras like the SSE4 instructions. It's being introduced along with the new manufacturing technology, the "tick" of Intel's plans. Then next year, when the 45-nanometer manufacturing technology is mature, Intel will introduce a new chip microarchitecture code-named Nehalem--the "tock"--with more significant changes to the chip design.
The rapid cadence is designed to ensure Intel won't get fooled again. Advanced Micro Devices caught Intel off guard earlier this decade, introducing a new chip architecture that represented a significant improvement in performance and power efficiency over Intel's chips at the time.

Read the rest of Krazit's story

See coverage on Techmeme

Watch Robert Scoble's 40-minute video tour of Intel's new 45-nanometer fab in Hillsboro, Oregon, with Intel Senior Fellow Mark Bohr (pictured below)