How the European Space Agency protects chips from cosmic radiation

How the European Space Agency protects chips from cosmic radiation

Summary: The ESA has detailed how its engineers design a processor that can operate within the high radiation environment of space.

SHARE:

The European Space Agency (ESA) has detailed what it takes to design a microprocessor that can survive in the harsh environment of space.

The agency designed the initial iteration of the LEON2-FT, a 32-bit processor used on both current and future ESA spacecraft: including the Alphasat telecoms satellite, the Proba-V microsatellite, the Earth-monitoring Sentinel family and the BepiColombo mission to Mercury.

LEON2-FT
The layout of the LEON2-FT processor that boasts a fivefold performance increase over its predecessor, the ERC32. Image: ESA

Being able to operate in high-radiation environments, as well as surviving the acceleration and vibration of launch, is an important feature for space-bound chips.

The FT in the chip's name stands for fault tolerant, as it has to cope with space radiation causing bits of data to flip in value.

The effect of a high-energy particle striking a microprocessor can range from flipping a bit - known as a Single Event Upset - to rupturing a transistor gate or causing a complete burn-out, known as a latch-up.

"As microprocessor gates become smaller and the absolute levels of power go down, our circuits are becoming more vulnerable to Single Event Upsets," Roland Weigand of ESA's microelectronics section said in a blog post published on Monday.

The chips the ESA uses are designed to deal with these events without failing, thanks to redundancy being built into their architecture.

"You might duplicate your bits at different sites around the microprocessor or use 'parity coding' to add on extra bits that help with detecting errors," said Weigand.

"Or you can triplicate your bits and then use a voting system to detect and correct errors: the result that comes up the most is likely to be right.

"Alternatively you can perform the same calculation multiple times - temporal instead of spatial redundancy."

The cost of this redundancy is that the chips will be larger, run slower and consume more power than terrestrial counterparts. The LEON2-FT is etched to a resolution of 180nm, while Intel's latest CPU is around 32nm.

Building redundancy into a chip without crippling performance requires optimisation of design, which drove ESA's decision to build the LEON architecture from the ground up.

"To limit these penalties requires a careful optimisation of the design, striving for compromises with the expected processor timing performance," said Weigand.

"So before introducing radiation tolerance features, the chip designers should ideally have in-depth knowledge of how the processor works. This is a real problem with commercial processors - based on proprietary information - and it is difficult to add in such features after cores have already been designed," Weigand said, describing the agency's rationale for designing the chip itself and coding the processor's instruction using definitions set out by the SPARC open standard.

Another factor that needs to be taken into account when building the chip is that sustained radiation exposure can also weaken the quality and electrical conductivity of the chip's semiconductor material, potentially leading to degraded performance or excessive power consumption.

The LEON2-FT microprocessor, known commercially as the AT697, was first used by ESA in its Columbus module on the International Space Station, where it carried out a number of tasks including detecting Automatic Identification System signals from maritime vessels to build up a global picture of ocean-going traffic.

ESA uses the LEON chip architecture as the basis for more than just microprocessors: for example a field programmable gate array based on the LEON2 architecture has been controlling a visual monitoring camera on ESA's Venus Express mission since 2005.

A history of space processors

ESA has been adapting chip designs for use in space since its role in developing the MA31750 16-bit, 16MHz microprocessor in the early 1990s.

Since that time ESA has supported the development of four generations of microprocessors for its spacecraft. Performance has increased significantly, from MA31750's two MIPS to the 85 Dhrystone MIPS of the LEON2-FT.

These chips been used in an array of ESA missions, from the inertial units guiding the Ariane 5 launchers to the Herschel and Planck space observatories.

The future of ESA's chips

Work to revise the LEON core for future space missions continues; both Alphasat and Galileo navigation satellites use LEON3-based reprogrammable chips in the elements of their payloads. Meanwhile ESA has contracted Gothenburg-based Aeroflex Gaisler to develop a quad-core microprocessor based on LEON4, for use over the next decade.

As well as being used on board ESA craft, the design of LEON has been made available to other European space organisations for use in system-on-a-chip microprocessors. For example, Astrium is using it to create a space-based GPS/Galileo sat-nav receiver.

Topics: Nasa / Space, Hardware, Processors

About

Nick Heath is chief reporter for TechRepublic UK. He writes about the technology that IT-decision makers need to know about, and the latest happenings in the European tech scene.

Kick off your day with ZDNet's daily email newsletter. It's the freshest tech news and opinion, served hot. Get it.

Talkback

1 comment
Log in or register to join the discussion
  • So ESA is bragging about rad-hardened OLD tech??

    The (rad-hardened) i486 chip on the Hubble is more powerful than this chip.

    And that is not the most powerful CPU in space. That title belongs to the RAD750 ... based on a PowerPC 750. There is a newer chip ... but is not in space yet and I can't remember the name.
    wackoae