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Intel puts flesh on Yonah

IDF: No figures but lots of ballpark as Intel talks up its next mobile chip, which will be able to enter a 'deeper sleep' mode
Written by Rupert Goodwins, Contributor

Intel revealed more details of Yonah, the dual-core processor at the heart of its Napa mobile computing platform, on Tuesday.

Due to start shipping in the first half of 2006, Yonah is a completely new design of processor combining 64-bit compatibility, 64GB memory addressing capability and 2MB of shared L2 cache.

"The power consumption is comparable to Dothan", said Ronnie Korner, CPU validation manager of Intel's mobile microprocessor group, comparing the new chip to the previous mobile design, "but it has lots of new features that give it substantially improved performance."

"We looked at a lot of code running on Dothan, and concentrated on improving the most common functions. Very common media functions are 30 percent faster," Korner added.

Integer division can be between twice and three times as fast, the chip can decode instructions with up to three times the bandwidth of before, and do some instructions in one cycle where four were previously required.

Special attention has been paid to the cache system, which saves power by turning itself off little by little when areas aren't in use. "A hardware algorithm predicts how much the CPU will use the cache, and during periods of low activity Yonah dynamically adapts its effective cache size," said Korner. He declined to offer any figures, saying that the chip was still being optimised prior to launch, but said that when the cache was fully empty the chip entered a new "Enhanced Deeper Sleep" where the minimum voltage needed to maintain the processor's internal state was applied.

The Napa platform also includes the 945 chipset and the Intel Pro/Wireless 3945ABG network adaptor, all of which have enhanced power management capabilities.

Korner also gave some details of Sossaman, a Yonah variant designed for blade servers. Substantially the same design, it adds dual-processor support so that each blade can have four cores, better memory error handling, thread synchronisation and an enhanced bus. It will work with the Lindenhurst E7520 chipset.

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