This tiny electron count is around 100,000 times fewer electrons than are used in current dynamic memory devices, and is close to the theoretical limit for electronic storage. Commercial products based on this technology would benefit from massively reduced power consumption and improved speed. But the technology is far from entering production yet.
A team from the Microelectronics Research Centre at Cambridge University's Cavendish Laboratory and from the Hitachi laboratory in Cambridge built the device.
The memory device is a three-by-three memory array that takes advantage of a quantum effect called the Coulomb blockage. The Coulomb blockage takes place on a nanometer scale, and depends on single electrons tunneling into and out of a tiny pool of other electrons called a quantum dot. When conditions are perfect, this requires next to no energy.
The device's design features cells formed from 50-nanometre silicon wires that have been embedded into the control areas of conventional transistors. This makes them easy to interface with standard circuits, minimizes the effects of electronic noise and makes the tiny change in current simpler to detect. Switching time is small and can be below 10 nanoseconds.
"We see the two aspects of integrating the device with standard CMOS and of running at such a high speed as the most significant aspects of these results," said David Williams of the research group. "This is the first time that we can categorically demonstrate that these devices can be built with what approximate to standard techniques."
The devices currently need to be kept at 60 degrees Kelvin, or some 200 degrees below freezing.
"The temperature isn't a show-stopper," Williams said. "The main issue is getting the sizes of array scaled up, although operating speeds and temperatures are also important." He said that work on the memory device had been going on for around 10 years, and that it would be most probably another 10 years before the equipment could be used in commercial production.