IBM debuts new wireless power management chip tech; promises better smartphones, TVs

IBM on Thursday announced that it was entering the power management semiconductor business with a new chip-making process that produces PM chips with wireless radio frequency communication.

The company says the feat cuts production costs by 20 percent of more, and allows for the fabrication of smaller chips that can control power usage and wirelessly communicate with systems in real time.

That's important for mobile consumer electronics products such as laptop computer, televisions and smartphones, and also increasingly for larger endeavors, such as connected buildings, transportation and the power grid.

As their name suggests, power management chips exist primarily to optimize power usage -- a bridge for electricity to flow through a system or device.  Any device with a power supply, battery or power cord uses a power-management chip, and they're important for a number of industries, from the CE industry to the auto industry.

IBM calls its process CMOS-7HV, and says the result is a chip that can take the place of three or four. Cheaper, smaller, more powerful -- that's the mantra of technological advancement, and the new process helps accelerate the rollout of "smart systems" that are made up of networks of lots of inexpensive sensors.

There's money to be made, too: the market for power management semiconductors is pegged at $31 billion, with a growth trajectory that suggests a doubling by 2014. And in the race to develop a better battery for electronics, a power-sipping chip allows manufacturers to use smaller, lighter, cheaper batteries.

Quick stats about wireless PM chips:

• Wireless PM chips can optimize electrical output for an entire array, "harvesting up to 57% of the power that is typically lost to real-world conditions such as dirty panels."
• Wireless PM chips can cut up to 30 percent off the weight of the car’s wiring harnesses.
• Wireless PM chips help smart buildings avoid hard wiring -- especially important for retrofits, the majority of the market -- and offer up to a 50 percent improvement in efficiency, IBM says.

• 180nm lithography
• Triple-gate oxide high voltage CMOS technology (high-voltage FETS from 20 to 50V extendable to 120V)
• Shallow-trench isolation
• 150K circuit/mm2
• RF: Precision poly, diffusion and well resistors; MIM capacitors, vertical natural capacitors for high voltage use; varactors; HV Schottky Barrier Diode; inductors; three to seven levels of Al; one-time programmable memory; wire-bond or solder-bump terminals.

IBM has scheduled full production for its chip tech for the first half of 2011.