Intel pins exascale dreams to Knights Ferry

Intel's hopes of building an exascale supercomputer by 2018 are pinned on the success of its 50-cores-and-above Many Integrated Core architecture, which will debut in Knights Ferry
Written by Jack Clark, Contributor

Intel is predicting the next wave of supercomputing will be founded on its many-integrated x86 core architecture, which is in development.

Kirk Skaugen Intel

Intel's Kirk Skaugen has said the next wave of supercomputing will be founded on its Knights Ferry chip architecture. Photo credit: Jack Clark

The many-integrated core (MIC) architecture, which Intel said on Monday was on track for a debut in 2012, is the company's best contender for scaling supercomputers to 1,000 petaflops — an exaflop — by 2018.

"We want to get CAT scans down to where you can get real-time information on the operating table," Intel's general datacentre manager, Kirk Skaugen, told journalists at a press conference. "We think exascale workloads will absolutely be involved in that to help make the world a better environment."

K Computer, the world's fastest computer as of June, is a system capable of 8.16 petaflops, according to the Top500 supercomputer list.

Intel hopes the 22nm Tri-Gate Knights Ferry and its successors will "deliver a hundred times the performance of today while only increasing power by two times", Skaugen said, noting that the 9MW that K Computer consumes — enough to power almost 10,000 family homes — is unsustainable.

To create the system, Intel and supercomputer specialists SGI have announced a strategic development partnership.

SGI plans to integrate MIC into its SGI Altix ICE servers. The company said MIC will become "a key part of its exascale strategy".

The world of proprietary high-end machines is going to go the way of the mainframe.
– Kirk Skaugen, Intel

Skaugen said he doubts Intel's high-performance computing (HPC) competitors, such as IBM with its Power7 chip architecture, will be able to maintain development at a pace sufficient to reach an exaflop before Intel.

"The world of proprietary high-end machines is going to go the way of the mainframe," he said.

"I can barely [develop MIC] when I have thousands of customers, and I need government support even with broad commercial applicability," he told ZDNet UK. "When you compare that with trying to build a proprietary system, [Intel's method] seems more of an advantage."

Skaugen admitted there were challenges involved in moving to an exaflop, with areas such as power efficiency, I/O rates, and on-chip and inter-chip communication all in need of development.

Broader than HPC

Intel hopes MIC will be suited for more than just the very top tier of HPC operators, with applications for businesses as well as non-commercial agencies. "We're not building MIC for 10 computers, we're not building it for 100 computers," Skaugen told ZDNet UK. "We think we can scale down to 16- and 64-node [compute] clusters, and we think that's very attractive to governments of the world."

The company hopes to apply the chip to large and medium-sized enterprises as well, "because no one wants to go and spend hundreds of millions if not billions of dollars to get somewhere just to have one computer", he said.

Beyond HPC, the chip can also be applied to business tasks such as data analytics or online transaction processing, Skaugen said.

A baby compared to Xeon

Whatever happens, MIC-architecture chips will remain a minority interest compared to Xeon, the company's mainstay for cloud computing applications and general-purpose servers, Skaugen said.

"Xeon, even in HPC, will be the vast majority of our volume in any scenario, probably 85-90 percent," he said. Skaugen noted that the company's low-power chip Atom, which targets devices otherwise likely to be powered by ARM, is "less than five percent of our volume".

"It's going to take years to get MIC into the mainstream; we're talking about 2018 for mainstream," he said.

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