Intel Rides Out...

Lots to digest in Intel's latest announcement about its many-core strategy. The new Many Integrated Core architecture (MIC, pronounced "Mike" as in Mike Magee) doesn't have many details available yet, except that the first Knights Ferry platform is basically Larrabee and the next one, Knights Corner, basically isn't.

Lots to digest in Intel's latest announcement about its many-core strategy. The new Many Integrated Core architecture (MIC, pronounced "Mike" as in Mike Magee) doesn't have many details available yet, except that the first Knights Ferry platform is basically Larrabee and the next one, Knights Corner, basically isn't. Make of that what you will concerning Larrabee's future - despite official confirmation that development on that platform is continuing, its first outing as a discrete graphics chip has been canned.

In fact, the differences between Knights Ferry and Knights Corner are going to be considerable. With KC, the 'sea of x86 cores' is going to be seasoned with other, specialised cores, and the details of that will be significant. The general idea is well understood in that various mathematical and data operations are far better handled with specialised silicon support, but how well that works will depend very heavily on the software tools available, as well as the intricacies of the inter-core connection architecture. As yet, we don't know anything about those KC specifics - except that there'd be little point in having the transitional KF out there unless a lot of what KF can teach developers will be transferable to the next generation of the architecture.

There will be comparisons with Itanium - much as such comparisons will annoy Intel, they are unavoidable. That was another new architecture with huge promise and transitional features, neither of which played out. Moreover, it was heavily dependant on new software tools, but suffered considerably because they didn't deliver and had problems tracking hardware architectural changes.

Unlike Itanium, though, MIC isn't being pitched as general purpose; rather, it's aimed entirely at high performance computing with even the distraction of stand-alone graphics being thrown overboard. This is a very sane approach. While there is nowhere for the mainstream market to go except into many-core, neither the market nor the technology is ready to see the stuff in the enterprise or on the desktop. HPC is the perfect area to develop the ideas behind many-core: as with the mainframes of the 50s and 60s, it deals with concepts and practicalities that will become mainstream in following decades.

One final straw in the wind: during the presentation at the International Supercomputing Conference, the far right of Intel's research timeline diagram was populated by carbon nanotube transistors. Although these have been talked about before by Intel (and others: IBM has been publishing on them since 2001), they are starting to crop up with increasing frequency. For those with an eye on the post-silicon world - less than 15 years away - nanotube technology and its close cousin, graphene, is making carbon increasingly likely as the horse to back.

(PS - I asked an Intel spokesperson whether "Knights Ferry" was a reference to the final scene in Monty Python and the Holy Grail. You may remember that a platform appears through the mist to carry the noble warriors to their final destination, only for the whole story to unravel in scenes of chaos, in-fighting and law-enforcement.

"Yes", he said.

I think he was joking.)

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