NASA's Jet Propulsion Laboratory in Southern California selected Microchip Technology of Chandler, Arizona, to develop a High-Performance Spaceflight Computing (HPSC) processor that will advance all types of future space missions, from planetary exploration to lunar and Mars surface missions, NASA said in a release Monday.
The processor architecture will allow computing power to be scalable based on mission needs, which will significantly improve overall computing efficiency for exploration missions. The design will also make the processor more reliable, enabling spacecraft computers to perform calculations up to 100 times faster than today's state-of-the-art space computers, according to NASA.
"Our current spaceflight computers were developed almost 30 years ago," said Wesley Powell, NASA's principal technologist for advanced avionics. "While they have served past missions well, future NASA missions demand significantly increased onboard computing capabilities and reliability. The new computing processor will provide the advances required in performance, fault tolerance, and flexibility to meet these future mission needs."
Microchip Technology will take three years to design and deliver the HSPC processor. During this time, the company will contribute significant research and development under a $50 million firm-fixed contract with NASA. Microchip Technology said it is pleased to be selected as NASA's partner in developing this technology.
"We are making a joint investment with NASA on a new trusted and transformative compute platform. It will deliver comprehensive Ethernet networking, advanced artificial intelligence/machine learning processing and connectivity support while offering unprecedented performance gain, fault-tolerance, and security architecture at low power consumption," said Babak Samimi, corporate vice president for Microchip Technology's communications business unit.