Cambridge researchers have demonstrated a nine-bit memory device that uses between one and ten electrons per bit. This is around 100,000 times fewer electrons than are used in current dynamic memory devices, and is close to the theoretical limit for electronic storage. Commercial devices based on this technology would have massively reduced power consumption and improved speed, although the technology is far from entering production.
The memory device is a three by three memory array based on a quantum effect called Coulomb blockage. This Coulomb blockage takes place on a nanometre scale, and depends on single electrons tunnelling into and out of a tiny pool of other electrons called a quantum dot. When conditions are perfect, this requires next to no energy.
The team at the Microelectronics Research Centre at Cambridge University's Cavendish Laboratory and Hitachi's laboratory also at Cambridge, built the device as cells formed from 50-nanometre silicon wires embedded into the control areas of conventional transistors. This made them easy to interface with standard circuits, minimised the effects of electronic noise and made the tiny change in current simpler to detect. Switching time is small and can be below 10 nanoseconds.
"We see the two aspects of integrating the device with standard CMOS and of running at such a high speed as the most significant aspects of these results" said David Williams of the research group. "This is the first time that we can categorically demonstrate that these devices can be built with what approximate to standard techniques."
The devices currently need to be kept at sixty degrees Kelvin, or some two hundred degrees below freezing. "The temperature isn't a show-stopper," Williams said, "The main issue is getting the sizes of array scaled up, although operating speeds and temperatures are also important." He said that the work had been going on for around ten years, with most probably another ten years to go to commercialisation.
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