​Samsung offers 14nm network chips with Rambus, eSilicon

Samsung Electronics, in collaboration with Rambus and eSilicon, has successfully made a network processor tape-out, or design pattern for integrated circuit, based on its 14-nanometer FinFET process.
Written by Cho Mu-Hyun, Contributing Writer on

Samsung has made a successful tape-out for network customers using its 14-nanometer FinFET process, in collaboration with eSilicon and Rambus, the company announced.

It used its 14 Low-Power Plus process and know-how from network applications together with eSilicon's ASIC and 2.5D design capability and Rambus' 28G SerDes solution for the design pattern.

Samsung also named its newly-developed 2.5 dimension turnkey solution I-Cube (Interposer-Cube), that connects a logic chip, or processor, with a HBM2 memory.

The commercial-ready 14-nanometer network process chip is the first to have applied the I-Cube solution, the company said.

Luc Seraphin, senior vice president and general manager of Rambus Memory and Interfaces Division, said in a statement, "This is the first of several other offerings we plan to bring to networking and enterprise ASIC markets around the globe."

The South Korean chip giant said I-Cube solution will be essential to network applications for high-speed signaling in networks, and will likely be adopted for other areas such as computing, servers, and artificial intelligence, where high-speed processing power is required.

Samsung began applying the second-generation 14-nanometer process early last year for mobile chips. The company has applied the 14-nanometer FinFET process for its own Eynos-brand of application processors, as well as for customers such as Qualcomm for its Snapdragon series.

It has begun mass production using its successor, the 10-nanometer process, for its upcoming Galaxy S8 smartphone. It started mass production of Exynos 9 using the process, which will power the phone.

Qualcomm's Snapdragon 835 is also being made using the cutting-edge process.

These are being made using the 10 Lower-Power Early (10LPE) process before being upgraded to 10 Lower-Power Plus (10LPP), the second-generation, later this year. 10LPP will then be used for network processors as well.

Samsung's chip division is compromised of its memory business and foundry, or logic chip, business. It has an overwhelming lead in memory, both in DRAMs and NAND flashes.

In foundry, Samsung is a runner-up to TSMC, and is aggressively leveraging its own dominance in mobile while expanding client bases.

The company is moving from 14-nanometer to 10-nanometer processes, and said it plans to next move to a 7-nanometer process.

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