Scots academics build mechanical arm for fast memory

Academics have developed a low power memory technology with application for smartphones, cameras and other consumer gadgets.

The 'mechanical arm' storage technology, developed by scientists at Edinburgh University, Seoul National University and Konkuk University in South Korea, uses a tiny cantilevered arm to deliver charge to gate electrodes in storage devices.

"We've come up with a new way to do the [electrode] charging which consumes very little power," researcher Eleanor Campbell, who worked on the technology in Edinburgh's chemistry department, told ZDNet UK on Monday. "We have a very little cantilevered arm, which is charged by attaching to a voltage source, and we charge the gate electrode by moving the arm down.

"With conventional flash memory, you have a gate, which is charged by electrons tunnelling. That's what determines the level of current and whether you have a one or a zero stored," Capmbell continued.

"But you have to have quite a high electric field to allow the electrons to tunnel to charge the gate, and there's a delay with that — about 10 microseconds — to charge the gate, and 10 milliseconds to erase it. [However ] the arm movement takes place in nanoseconds," she said.

The mechanical arm technology cuts the power cost of charging and reading data off the gates and is faster, Campbell said, although she gave no exact timings.

We've come up with a way to do the [electrode] charging which consumes very little power.

– Eleanor Campbell, Edinburgh University

The technology requires a tiny arm to be assigned to each gate — or each bit of data — and, although this carries a cost of manufacture, it gives you greater flexibility for writing and erasing data, Campbell said.

In this case, the technology was demonstrated by measuring a current passing through a carbon nanotube, with the binary value of the data determined by an electrode that controlled the current, Campbell said. She went on to add that the technology could be extended.

"We've demonstrated this by using a nanotube transistor, mainly because we're nanotube experts, but in principle the idea could be applied to other transistors for the charging and erasing steps," she said. "How practical it will be to really integrate this and to have millions of these [arms] on a processor is another matter."

The device will also work for multi-bit programming, as the signal users can get or store via the arm depends on the charge level at the gate, Campbell said.