Terabit 3-D chips will keep the flash party rolling

Industry seers have been predicting the end of NAND flash's rapid price declines and density increases due to physical limits. But if you can't get smaller, get higher. Here's how Samsung plans to mass produce 1 Tbit chips in 2013.
Written by Robin Harris, Contributor

Higher flash bit density and lower cost is the major driver of flash's success in the last five years. But many in the industry, including SanDisk CEO Eli Harari, have predicted that flash will hit a wall: 3 or 4 generations of process shrink before flash became slower - and less reliable - than disk.

But at the 2009 Symposia on VLSI Technology and Circuits in Kyoto, Toshiba and Samsung showed technology that could take NAND flash to 1 Tbit per chip. In five years you could be carrying a 4 TB drive on your keychain.

Let's get vertical Ever smaller feature sizes have made NAND flash cheaper and denser. Multi-level (MLC) flash - where a cell stores two or more bits - has further increased density.

But shrinking feature sizes also shrinks the number of electrons that represent a bit of data. Vendors already use sophisticated signal processing to determine if a bit in a cell is a one or zero, but as the number of electrons in a cell shrinks it takes more time to determine a cell's state. And the number of writes declines as well.

If you can't get smaller get higher. 3-D cell technology stacks cells one on top of the other.

Cost is the problem The hard part is adding layers without adding cost. Otherwise flash loses the cost advantage that has made it the industry darling and consumer favorite.

Toshiba, the inventor of flash, demonstrated a 32 Gbit prototype using 3-D cell technology. But Samsung, the world's largest manufacturer of flash today, seems to have an early lead in 3-D technology.

Samsung announced something called VG-NAND (Vertical Gate). In this design the electrode and dielectric layers are laid down and then tiny vertical grooves are batch processed into the chip so control gates can be implanted. This gives high density without a lot of extra processing.

Here's what it looks like:

Vertical Gate NAND cross-section. Image courtesy Samsung.

Vertical Gate NAND cross-section. Image courtesy Samsung.

The Storage Bits take Flash emerged as an economic competitor to DRAM only three years ago. In that short time it has had a dramatic effect on storage system architecture and cost.

Shrinking feature sizes have driven that success, but semiconductor physics imposes hard limits. 3-D chips and more investment in process technology promise to keep flash marching forward for at least the next five years.

Comments welcome, of course. Back in the early 80s many warned that alpha radiation would flip bits in 1 Mbit DRAM chips and render them useless. The engineers figured it out. More detail on 3-D flash in this report from Nikkei Electronics Asia.

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