Researchers Laura M. Grupp and Steven Swanson from the UCSD Non-volatile Systems Lab and John D. Davis of Microsoft Research collected data from 45 flash chips from 6 manufacturers. Using that empirical data they predict the performance and cost characteristics of future SSDs.
It's not pretty.
Faster better cheaper or slower worse cheaper?
While NAND flash is produced with semiconductor processes, it doesn't follow the normal virtuous circle of smaller feature size, faster performance, greater reliability and lower cost that we associate with the last 50 years of chip technology.
NAND flash traps electrons in quantum wells. As feature sizes shrink, so do the quantum wells and, more critically, the number of trapped electrons that store the information. That makes it harder to preserve and read the stored information.
Figures of merit
While density, capacity and cost per bit improves with smaller feature sizes, the research found that every other figure of merit - performance, program/erase endurance, energy efficiency, and data retention time - all got worse as feature sizes shrink.
Based on past performance, the team derived equations to describe how changes in feature size have impacted key specs. They looked at SLC, MLC and TLC and feature sizes scaled from 72 nm to 6.5 nm (the consensus smallest feature size published in the International Technology Roadmap for Semiconductors (ITRS0), and assume a fixed silicon budget for flash storage.
Key results include
- Latency. MLC write latency will double over time. Triple-level cell writes will grow to over 2.5MS, noticably reducing its performance advantage over disk writes.
- Bandwidth. Small - 512B - read bandwidth and all writes decline by up to 50% over time. The impact is greatest on high-performance SLC flash.
- IOPS. MLC flash I/O rates will drop almost in half.
Taken together the research suggests that flash may be not much better than disk in a few short years.
The Storage Bits take
One important qualifier is that for the purposes of their modeling the team constrained the number of chips in the hypothetical future devices whose performance they predicted. While fine for isolating the impact of future chip shrinks, it ignores the potential of much greater parallelism for managing these changes.
Bandwidth drops by half? Double the number of chips.
But if something can't go on forever, it won't. NAND flash will soon enter an end-of-life crisis for computer applications that need performance. That's why ReRAM (resistance RAM) looks to be a good bet for replacing computer flash - not mobile device flash - over the next decade.
Comments welcome, of course. Here's a link to The Bleak Future of NAND Flash Memory (pdf).