CES 2018: New Intel core processor adds Radeon RX Vega M graphics

Intel has announced its 8th-generation core processor, combining AMD's Radeon RX Vega M Graphics and 4GB of second-generation high-bandwidth memory (HBM2), at CES 2018 in Las Vegas.

Aimed at enthusiasts and available in core i5 and i7 configurations, Intel director of Client Graphics Marketing John Webb said the new processor will balance performance and mobility by combining the strengths of its previous processors.

"The G series brings together the best of both of these worlds; what it allows us to get is much more performance into a thinner and lighter class system, whether it's a mobile platform or a small form factor desktop," Webb said.

"So you're going to get ... uncompromising, high-performance mobile enthusiast CPUs, but then you're going to be able to take that on the road more efficiently with you."

Intel's 8th-gen core processor includes Intel Quick Sync Video with VP9, HEVC 10b, and H264 hardware acceleration; and Intel's Gfx Display Engine, with support for three displays, 4K resolution, and an embedded DisplayPort with Panel Self-Refresh (eDP/PSR) for longer battery life.

See also: CES 2018 special coverage (CNET)

The custom Radeon RX Vega M Graphics component features a high-bandwidth cache controller; quad geometry engines; a Vega Pixel Engine with up to 16 render back ends and up to 64 pixels per clock; up to 24 compute units with asynchronous dispatch and per compute unit power gating, which is Vulkan and DirectX 12-ready and supports Radeon Shader Instrinsics; a Radeon Display Engine supporting six displays, 4K resolution, DisplayPort 1.4 with HDR, and HDMI 2.0b with HDR10 support; and a Radeon Multimedia Engine with 4K60 encode/decode with Radeon ReLive, and HEVC with H264 HDR encode/decode.

"We've acquired a custom-built Vega M part for Intel. This is supplied by Radeon, and it was really this Vega architecture that we needed in order to do this product," Webb said.

"Vega has this high-bandwidth cache controller, which allows us to interface the HBM memory. And so without that, we couldn't have had HBM on it ... the other thing is Vega made improvements in their render backs and their pixel clock rates so that we had better performance.

"The other thing unique is that this has 24 compute units ... because it's mobile, highly important is the per compute unit power gating, which means when we're not using those compute units, we can actually shut it down for battery life."

The combination of the Radeon media subsystem and the Intel graphics subsystem means "two fully functional GPU media and display subsystems" are on-board, he said.

"The way I look at this is for OEMs that are designing ... portable systems is they want the best battery life possible, and that's when you're watching a movie and you have your screen up in productivity mode, and that's really delivered by the Intel media and Quick Sync systems," he added.

Lastly, the HBM2 component contains high-bandwidth cache with 4GB capacity, 1,024-bit bus width, and low power usage.

"HBM was another key fundamental part of this, where we took a discrete memory system that consisted of essentially six pieces of memory and we put them all into one piece of HBM, 4 gigabytes," Webb said.

"The nice thing about HBM is not only the space savings, but also the power savings. It utilises 80 percent less power than traditional GDDR5."

It saves the OEM 1,900 square millimetres of space, according to Webb.

The chip also utilises Intel's Embedded Multi-die Interconnect Bridge (EMIB) technology, which Webb called "the key technology enabler".

"This is a unique piece of silicon to Intel. And what EMIB does is it allows us to connect the GPU and the memory together," Webb said, explaining that it combines the components into a smaller package, reducing the silicon footprint by 50 percent.

The embedded high-speed connector keeps the CPU and GPU at just 1.7mm.

Eight lanes of third-generation PCI Express (PCIe) then connects the CPU and GPU, and provides the necessary bandwidth to feed "intense" gfx workloads, Intel said. The remaining PCIe lanes routed off the package are then available for direct CPU access connecting other devices.

Intel is additionally using dynamic tuning to control the power between the CPU, GPU, and memory.

"We actively monitor system information [and] temperature about 10 times a second to ensure that we're giving the right thermal and power balancing," Webb explained, adding that this achieves around 18 percent better efficiency in gaming, meaning a thinner, lighter platform for OEMs.

"So the combination of the hardware benefits as well as the software benefits brings a lot of innovation to this product."

Disclosure: Corinne Reichert travelled to CES 2018 in Las Vegas as a guest of Intel

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