Samsung has shared the process design kit (PDK) for its touted 3nm chip process with potential clients, the company announced.
The South Korean tech giant, at the Samsung Foundry Forum 2019 USA in Santa Clara, announced that it had shared the kit with customers in April.
Samsung's 3nm Gate-All-Around (GAA) process is expected to use 45% less space, consume 50% less power, while increasing efficiency by 35%, compared to the 7nm process that is currently used commercially.
Sharing the kit will shorten the time-to-market and design schedules for clients, Samsung said.
The company also showcased its Samsung Advanced Foundry Ecosystem Cloud (SAFE-Cloud) program at the event. SAFE-Cloud is a cloud platform that allows users to design chips.
Samsung will work with Amazon Web Services, Microsoft Azure for its cloud services, and Cadence and Synopsys for electronic design automation to allow customers to use the cloud platform to improve their ability to work flexibly.
Last month, Samsung announced its success in developing the 5nm process which will be commercialised early next year.
The breakthrough 28nm eMRAM, which will have writing speeds that are 1000x faster than eFlash, will also be deployed then, the company said.
Last month, Samsung announced that it would invest 133 trillion won in its logic chip businesses for the next ten years.
The company is competing fiercely with Taiwanese giant TSMC, the market leader in contract-chip making, and is attempting to gain market share through the deployment of newer processes such as the 5nm one.
Samsung has received the ISO 26262 Certification from TUV Rheinland for functional safety in its product development process for automotive semiconductors.
The Internet of Things processor is optimised for data communications shorter than 100 metres, Samsung said.
Samsung Electronics has successfully developed a 5nm semiconductor process to gain more chip-making clients, pushing Moore's Law to its limit.
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